1. Field of the Invention
The present invention relates to a method for forming a buried diffusion layer in a surface of a semiconductor substrate, and more particularly to a method for forming a buried diffusion layer having reducing topography in a semiconductor substrate.
2. Description of the Prior Art
To satisfy the demands for high integration, low cost and high-speed operation, both of a buried diffusion layer and a salicidation technology are utilized for fabricating semiconductor devices. For example, FIG. 1 is a top view of a conventional flash memory device, which is provided with buried diffusion layers and shallow trench isolation regions. A buried diffusion layer 12 is formed in a surface of a semiconductor substrate 10 to serve as source and drain regions of memory cells. A word line 14 is formed on the semiconductor substrate 10 adjacent to one side of the buried diffusion layer 12. And, a plurality of shallow trench isolation region 16 is formed in the semiconductor substrate 10 to isolate each memory cell.
FIG. 2 is a cross-sectional view of a unit memory cell 100 along line L—L of FIG. 1. The memory cell 100 includes a control gate 14, a floating gate 142, an interpoly oxide 144 between the control gate 14 and floating gate 142, and a gate oxide 140 under the floating gate 142. The drain region 12a is coupled to a bit line via a contact 18, and the source region 12b is connected to other sources region across shallow trench isolation regions 16 to couple to a common contact 20 to contact virtual ground devices (not shown) or to other structures for control of the voltage of the diffused source regions during erase, write, and read operations.
FIG. 3 is a cross-sectional view along line T—T of FIG. 1, the buried diffusion layer 12 served as source regions is coupled to a common contact 20 across the shallow trenches 16a. A salicide (not shown) is formed on the surfaces of the shallow trenches 16a adjacent to the buried diffusion layer 12 to reduce the resistance of the source regions. The depth of the shallow trench 16a is about 2000 to 5000 angstroms. Therefore, there will be some problems to be overcome when forming the buried diffusion layer 12 in the surface of the semiconductor substrate 10 along the surroundings of the shallow trenches 16a by way of ion implantation and forming the salicide on the surfaces of the shallow trenches 16a. For example, it is hard to implant ions into the steep sidewall of the shallow trench 16a. And, it is difficult to form the salicide on the sidewall of the shallow trench 16a due to poor step coverage.
Accordingly, it is an intention to provide a method for forming a buried diffusion layer with reducing topology in the surface of the semiconductor substrate, which can overcome the above drawbacks, and advantageously forming a salicide on the buried diffusion layer.